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  • Types of Substrates and Wafers

    Single Element Semiconductors

    Silicon, Si - the most common semiconductor, atomic number 14, energy gap Eg = 1.12 eV - indirect bandgap; crystal structure - diamond, lattice constant 0.543 nm, atomic concentration 5x1022 atoms/cm-3, index of refraction 3.42, density 2.33 g/cm3, dielectric constant 11.7, intrinsic carrier concentration 1.02 x 1010 cm-3, mobility of electrons and holes at 300 K: 1450 and 500 cm2/V-s, thermal conductivity 1.31 W/cm-oC, thermal expansion coefficient 2.6 x 10-6 1/oC, melting point 1414 oC; excellent mechanical properties (MEMS applications); single crystal Si can be processed into wafers up to 300 mm in diameter.

    Silicon on Insulator (SOI)

    Only a thin layer on the surface of a silicon wafer is used for making electronic components; the rest serves essentially as a mechanical support. The role of SOI is to electronically insulate a fine layer of monocrystalline silicon from the rest of the silicon wafer. Integrated circuits can then be fabricated on the top layer of the SOI wafers using the same processes as would be used on plain silicon wafers. The embedded layer of insulation enables the SOI-based chips to function at significantly higher speeds while reducing electrical losses. The result is an increase in performance and a reduction in power consumption. There are two types of SOI wafers. Thin film SOI wafers have a device layer <1.5 ?m and thick film wafers have a device layer >1.5 μm.

    Wafer bonding. - In this process the surface of two wafers are coated with an insulating layer (usually oxide). The insulating layers are then bonded together in a furnace creating one single wafer with a buried oxide layer (BOX) sandwiched between layers of semiconductor. The top of the wafer is then lapped and polished until a desired thickness of semiconductor above the BOX is achieved.

    SIMOX - Separation by Implantation of Oxide. In this process a bulk semiconductor wafer is bombarded with oxygen ions, crating a layer of buried oxide. The thickness of intrinsic semiconductor above the box is determined by the ion energy. An anneal reinforces Si-O bonds in the BOX.

    Smart Cut - The wafer bonding method is used to form the BOX, but instead of lapping off excess semiconductor (which is wasteful) a layer of hydrogen is implanted to a depth specifying the desired active layer of semiconductor. An anneal at ~500oC splits the wafer along the stress plane created by the implanted hydrogen. The split wafer may then be reused to form other SIO wafers.

    Substrates for III-V Semiconductors

    Gallium Arsenide, After silicon second the most common semiconductor. Due to GaAs evaporation, does not form sufficient quality native oxide, mechanically fragile, due to direct bandgap commonly used to fabricate light emitting devices, due to higher electron and hole mobilities, also foundation of the variety of high-speed electronic devices, bandgap can be readily engineered by forming ternary compounds based on GaAs, e.g. AlGaAs.

    Gallium Nitride, GaN - wide bandgap III-V semiconductor with direct bandgap 3.5 eV wide; among very few semiconductors capable of generating blue radiation, GaN is used for blue LEDs and lasers; intrinsically n-type semiconductor but can be doped p-type; GaN is formed as an epitaxial layer; Lattice mismatch remains a problem, creating a high defect density. Incorporation of Indium (InxGa1-xN) allows control of emission from green to violet (high and low In content respectively). GaN can also be used in UV detectors that do not respond to visible light. GaN has a Wurtzite(W) or Zinc Blend(ZB) crystal structure.

    Examples substartes usually ued for Semiconductors include CdSe, CdTe, CdHgTe, ZnS.

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